In a digital system, speeding up or wider bandwidth of signal transmission is the most fundamental problem. In a conventional art which uses electrical interconnection in signal transmission, it is difficult to actualize high speed operation in the range of not lower than gigahertz. On the other hand, in signal transmission by means of light, light is used by modulating in a frequency considerably lower than the frequency (to several hundred terahertz), so that it is hard to raise a problem associated with the speeding up.
In high speed signal transmission by means of electrical interconnection, capacitance due to interconnection needs to be charged; whereas, in signal transmission by means of optical interconnection, capacitance due to interconnection does not need to be considered. Consequently, if capacitance of an optical receiver is sufficiently small, electric power consumption of the entire circuit can be suppressed.
Nowadays, reduction in circuit voltage is required; however, in order to cope with such request, it is necessary to suppress generation of electromagnetic noise and enhance resistance against noise. Consequently, optical interconnection is strongly required to be introduced in a digital system, particularly in a semiconductor integrated circuit. In the semiconductor integrated circuit, particularly, distribution means for clock signals and large capacity data transfer means in buses for use in communication between subsystems are required.
A clock signal is an important signal which decides timing and throughput of the entire system in a synchronous type digital system. For example, clock frequency of a central processing unit (referred to as CPU) is a basic factor which decides data processing speed. Bus clock frequency is a basic factor which decides data transfer speed.
In order to actualize high speed data transfer speed, it is required to use high speed memory elements such as a latch and a flip-flop, and to prevent a racing condition in which a clock signal faultily passes through not lower than two memory elements for one period. Furthermore, when distributing the clock signals, an invalid time in machine cycle needs to be as small as possible in order to minimize an increase in cycle time.
In a high speed digital system, it is an important problem to distribute the clock signals so as to suppress skew in which a phase difference is generated in waveforms between locations. In order to reduce the skew, there is used an H-tree system or the like which performs electrical interconnection so that all circuits are arranged in equal distance from a clock driver. Examples of the skew factor other than the interconnection include that transistors to be used and interconnection parameters vary according to processes, or clock buffer delays are different through the entire system because load capacities are not uniform.
In buses for connecting between subsystems, there include buses for connecting between processor memories which require high speed performance, input and output buses in which devices to be connected are over broadband, and the like. Speeding up has been observed in not only processors and memories, but also in input and output devices; and therefore, demand for higher speed and wider bandwidth with respect to the buses is further increased. However, there is a limit for higher speed and wider bandwidth by means of electrical interconnection.
On the other hand, in the signal transmission by means of light, wider bandwidth can be used as compared with the signal transmission by means of electrical interconnection; and moreover, there is an advantage in that electromagnetic noise is not generated. This suggests that high speed clock distribution by means of light can be made.
By the way, a signal voltage which is obtained from an optical receiver in the case where a light source having a usual output level for use in electronics such as a laser diode is too low for operating a digital circuit in a large scale integrated circuit (referred to as LSI). Consequently, in order to operate the digital circuit by electrical signals from the optical receiver, a trans-impedance amplifier (referred to as TIA) is generally provided at a later stage of the optical receiver.
On the condition that input impedance is high and output capacity of the optical receiver is small, the TIA can output a high signal voltage necessary for the clock distribution by means of light. In this regard, however, in order to actualize, an installation size of the TIA needs to be approximately several 10 to 100 μm, which is larger than the optical receiver. Therefore, it is not easy to provide many light receiving elements with the TIA on the LSI.
Furthermore, in order to ensure a sufficiently high signal/noise ratio in an optical transmission system, there is a technique which uses an optical signal having a very short pulse width. According to such technique, a high signal voltage can be taken out from a light receiving element with small electric power consumption. Generally, a mode-lock laser or the like in which a peak output reaches in the range of kilowatt is used for such purpose. The mode-lock laser can generate an optical pulse train which has a pulse interval with very small fluctuation; and therefore, the mode-lock laser can be used for clock distribution by means of light, which is disclosed in Non-Patent Document 1 (to be described later).
A pulse signal from the light receiving element can be converted to High and Low binary signal groups by an integrating circuit or a high speed memory element such as a latch, a flip-flop, or the like. As such an optical interconnection circuit, Patent Document 1 discloses a configuration which separately irradiates two optical pulse train signals to two metal-semiconductor-metal (referred to as MSM) photodiodes.
In addition, Non-Patent Document 1 discloses that a clock signal of 10 GHz can be created without using the TIA having a large installation area by irradiating two optical pulse trains which differ in phase by a half period to two photodiodes connected in a totem pole type using the mode-lock laser.                Patent Document 1: Japanese Patent No. 2721475        Non-Patent Document 1: C. Debaes et al., Receiver-less optical clock injection for clock distribution networks, IEEE J. Selected Topics in Quantum Electronics, vol. 9, pp. 400-409, 2003        